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Authors: | Lars Schor |
Group: | Computer Engineering |
Type: | PhD Thesis |
Title: | Programming Framework for Reliable and Efficient Embedded Many-Core Systems |
Year: | 2014 |
Month: | October |
Pub-Key: | s2014a |
Keywords: | MOC, DSE, MPSOC, many-core systems, dal |
ETH Nbr: | 22211 |
Pub Nbr: | 148 |
School: | ETH Zurich |
Abstract: | Many-core systems-on-chip (SoCs) are of increasing significance in the domain of high-performance embedded computing systems where high performance requirements meet stringent timing constraints. The high computing power offered by many-core SoCs, however, does not necessarily translate into high performance. On the one hand, the use of deep submicrometer process technology to fabricate SoCs imposes a major rise in the power consumption per unit area so that many-core SoCs face various thermal issues. On the other hand, many-core SoCs are often not capable of fully exploiting the provided hardware parallelism due to runtime variations of executing applications. In this thesis, we focus on the system-level design of streaming-oriented embedded systems. We tackle the above described challenges by proposing a model-driven development approach for many-core SoCs. The developed high-level programming model specifies an application as a network of autonomous processes that can only communicate over point-to-point first-in first-out (FIFO) channels. We show that the properties of the proposed programming model can be leveraged to develop a design, optimization, and synthesis process for embedded many-core SoCs that enables the system to utilize its computing power efficiently. Specifically, the following contributions are presented in this thesis: - A scenario-based design flow for mapping a set of dynamically interacting streaming applications onto a heterogeneous many-core SoC is presented. - A novel semantics for specifying streaming applications is introduced that abstracts several possible application granularities in a single high-level specification. - A systematic approach to exploit the multi-level parallelism of heterogeneous many-core architectures is proposed and applied to develop a general code synthesis framework to execute streaming applications on heterogeneous systems. - A high-level optimization framework for mapping streaming applications onto embedded many-core architectures and optimizing a system design with respect to both performance and worst-case chip temperature is proposed. |
Location: | Gloriastrasse 35, 8092 Zurich, Switzerland |
Resources: | [BibTeX] [Paper as PDF] |