 |
|
|||
| Authors: | Lars Schor, Iuliana Bacivarov, Devendra Rai, Hoeseok Yang, Shin-haeng Kang, Lothar Thiele |
| Group: | Computer Engineering |
| Type: | Inproceedings |
| Title: | Scenario-Based Design Flow for Mapping Streaming Applications onto On-Chip Many-Core Systems |
| Year: | 2012 |
| Month: | October |
| Pub-Key: | sbrykt2012a |
| Book Titel: | Proc. International Conference on Compilers Architecture and Synthesis for Embedded Systems (CASES) |
| Pages: | 71-80 |
| Keywords: | MOC, DSE, MPSOC, many-core systems, dal |
| Publisher: | ACM |
| Abstract: | The next generation of embedded software has high performance requirements and is increasingly dynamic. Multiple applications are typically sharing the system, running in parallel in different combinations, starting and stopping their individual execution at different moments in time. The different combinations of applications are forming system execution scenarios. In this paper, we present the distributed application layer, a scenario-based design flow for mapping a set of applications onto heterogeneous on-chip many-core systems. Applications are specified as Kahn process networks and the execution scenarios are combined into a finite state machine. Transitions between scenarios are triggered by behavioral events generated by either running applications or the run-time system. A set of optimal mappings are precalculated during design-time analysis. Later, at run-time, hierarchically organized controllers monitor behavioral events, and apply the precalculated mappings when starting new applications. To handle architectural failures, spare cores are allocated at design-time. At run-time, the controllers have the ability to move all processes assigned to a faulty physical core to a spare core. Finally, we apply the proposed design flow to design and optimize a picture-in-picture software. |
| Location: | Tampere, Finland |
| Resources: | [BibTeX] [Paper as PDF] |
